As the integration of a semiconductor device becomes high, interconnect spacing in the interior of the semiconductor device becomes narrow; and there is a risk that a leakage current may occur between the interconnects. For example, in a stacked semiconductor memory device, an interconnect region is formed by making through-holes and trenches in a stacked body and by dividing an array of memory cells into block units. In the case where the interconnects are formed by forming the desired material as a film in the through-holes and the trenches, it is difficult to form the interconnects uniformly inside the stacked body. Also, there are cases where such through-holes and trenches become finer toward the lower layers; and fluctuation occurs easily between the upper layers and the lower layers in the interconnect region. Thereby, a difference of the programming speed of the data occurs between interconnect regions; and discrepancies of the memory operations undesirably occur.